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INDUSTRIALTEMPERATURERANGE
IDT5T9890
EEPROM PROGRAMMABLE 2.5V PROGRAMMABLE SKEW PLL CLOCK DRIVER
EEPROMOPERATION
(see I2C Interface Definition for the EEPROM instructions)
TheIDT5T9890canalsostoreitsconfigurationininternalEEPROM. Thecontentsofthedevice’sinternalprogrammingregisterscanbesavedtotheEEPROM
by issuing a save instruction (ProgSave) and can be loaded back to the internal programming registers by issuing a restore instruction (ProgRestore). To
initiate a save or restore, only two bytes are transferred. The Device Address is issued with the read/write bit set to ‘0’ followed by the appropriate Command
Code. The save or restore instruction executes after the STOP condition is received, during which time the IDT5T9890 will not generate Acknowledge bits.
The device is ready to accept a new programming instruction once it Acknowledges its 7-bit address. The time it takes for the save and restore instructions
to complete depends on the PLL oscillator frequency, FVCO. The restore time, TRESTORE, and the save time, TSAVE, can be calculated as follows:
TRESTORE = 1.23X109/FVCO
(mS)
TSAVE = 3.09X109/FVCO + 52
(mS)
In order for the save and restore instructions to function properly, the IDT5T9890 must not be in power-down mode (PDmust be HIGH), and the PLL must
be enabled (PLL_EN must be LOW and Bit 57 = 0).
Onpower-upoftheIDT5T9890,anautomaticrestoreisperformedtoloadtheEEPROMcontentsintotheinternalprogrammingregisters. Theauto-restore
will not function properly if the device is in power-down mode (PD must be HIGH). The device’s auto-restore feature will function regardless of the state of
the PLL_EN pin or Bit 57. The IDT5T9890 will be ready to accept a programming instruction once it acknowledges its 7-bit I2C address. The time it takes
for the device to complete the auto-restore is approximately 3ms.
PROGRAMMINGNOTES
OncetheIDT5T9890hasbeenprogrammedeitherwithaProgWriteorProgRestoreinstruction,thedevicewillattempttoachievephaselockusingthenew
PLLconfiguration. IfthereisavalidREFandFBinputclockconnectedtothedeviceanditdoesnotachievelock,theusershouldissueaProgReadinstruction
to confirm that the PLL configuration data is valid.
Onpower-upandbeforetheautomaticProgRestoreinstructionhascompleted,theinternalprogrammingregisterswillcontainthevalueof‘0’forallbits95:0.
ThePLLwillremainattheminimumfrequencyandwillnotachievephaselockuntilaftertheautomaticrestoreiscompleted. Iftheoutputsareenabledbythe
nSOE pins, the outputs will toggle at the minimum frequency. If the outputs are disabled by the nSOE pins and the OMODE pin is set HIGH, the nQ[1:0] and
QFB are stopped HIGH, while QFB is stopped LOW.
SCLK
SDA
tSU:START
tSU:STOP
STOP
Data can
change
Address or data
valid
tHD:START
START
SCLK
SDA IN
tSU:START
tSU:STOP
tHD:START
tLOW
tHIGH
tHD:DATA
tSU:DATA
tBUF
tR
tF
tOVD
SDA OUT
Figure 1: I2C Timing Data
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